Scalable Fully Pipelined Hardware Architecture for In-Network Aggregated AllReduce Communication

Yao Liu 0006, Junyi Zhang, Shuo Liu 0002, Qiaoling Wang, Wangchen Dai, Ray Chak-Chung Cheung. Scalable Fully Pipelined Hardware Architecture for In-Network Aggregated AllReduce Communication. IEEE Trans. Circuits Syst. I Regul. Pap., 68(10):4194-4206, 2021. [doi]

@article{LiuZLWDC21,
  title = {Scalable Fully Pipelined Hardware Architecture for In-Network Aggregated AllReduce Communication},
  author = {Yao Liu 0006 and Junyi Zhang and Shuo Liu 0002 and Qiaoling Wang and Wangchen Dai and Ray Chak-Chung Cheung},
  year = {2021},
  doi = {10.1109/TCSI.2021.3098841},
  url = {https://doi.org/10.1109/TCSI.2021.3098841},
  researchr = {https://researchr.org/publication/LiuZLWDC21},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. Circuits Syst. I Regul. Pap.},
  volume = {68},
  number = {10},
  pages = {4194-4206},
}