Alexander López-Parrado, Jaime Velasco-Medina. SoC-FPGA implementation of the sparse fast fourier transform algorithm. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 120-123, IEEE, 2017. [doi]
@inproceedings{Lopez-ParradoV17,
title = {SoC-FPGA implementation of the sparse fast fourier transform algorithm},
author = {Alexander López-Parrado and Jaime Velasco-Medina},
year = {2017},
doi = {10.1109/MWSCAS.2017.8052875},
url = {https://doi.org/10.1109/MWSCAS.2017.8052875},
researchr = {https://researchr.org/publication/Lopez-ParradoV17},
cites = {0},
citedby = {0},
pages = {120-123},
booktitle = {IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017},
publisher = {IEEE},
isbn = {978-1-5090-6389-5},
}