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High-Level Topology Synthesis Method for Δ-Σ Modulators via Bi-Level Bayesian Optimization

Jialin Lu, Yijie Li, Fan Yang 0001, Li Shang, Xuan Zeng 0001. High-Level Topology Synthesis Method for Δ-Σ Modulators via Bi-Level Bayesian Optimization. IEEE Trans. Circuits Syst. II Express Briefs, 70(12):4389-4393, December 2023. [doi]

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Jialin Lu

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Yijie Li

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Fan Yang 0001

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Li Shang

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Xuan Zeng 0001

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