Power-Performance Optimization of a Virtualized SMT Vector Processor via Thread Fusion and Lane Configuration

Yaojie Lu, Seyed Amin Rooholamin, Sotirios G. Ziavras. Power-Performance Optimization of a Virtualized SMT Vector Processor via Thread Fusion and Lane Configuration. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016. pages 81-86, IEEE, 2016. [doi]

@inproceedings{LuRZ16-0,
  title = {Power-Performance Optimization of a Virtualized SMT Vector Processor via Thread Fusion and Lane Configuration},
  author = {Yaojie Lu and Seyed Amin Rooholamin and Sotirios G. Ziavras},
  year = {2016},
  doi = {10.1109/ISVLSI.2016.27},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2016.27},
  researchr = {https://researchr.org/publication/LuRZ16-0},
  cites = {0},
  citedby = {0},
  pages = {81-86},
  booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016},
  publisher = {IEEE},
  isbn = {978-1-4673-9039-2},
}