Yandong Luo, Sourav Dutta, Ankit Kaul, Sung Kyu Lim, Muhannad S. Bakir, Suman Datta, Shimeng Yu. A Compute-in-Memory Hardware Accelerator Design With Back-End-of-Line (BEOL) Transistor Based Reconfigurable Interconnect. IEEE J. Emerg. Sel. Topics Circuits Syst., 12(2):445-457, 2022. [doi]
@article{LuoDKLBDY22,
title = {A Compute-in-Memory Hardware Accelerator Design With Back-End-of-Line (BEOL) Transistor Based Reconfigurable Interconnect},
author = {Yandong Luo and Sourav Dutta and Ankit Kaul and Sung Kyu Lim and Muhannad S. Bakir and Suman Datta and Shimeng Yu},
year = {2022},
doi = {10.1109/JETCAS.2022.3177577},
url = {https://doi.org/10.1109/JETCAS.2022.3177577},
researchr = {https://researchr.org/publication/LuoDKLBDY22},
cites = {0},
citedby = {0},
journal = {IEEE J. Emerg. Sel. Topics Circuits Syst.},
volume = {12},
number = {2},
pages = {445-457},
}