Shinichi Maeta, Atsushi Kosaka, Akihisa Yamada 0001, Takao Onoye, Toru Chiba, Isao Shirakawa. C-based hardware design of IMDCT accelerator for Ogg Vorbis decoder. In 2004 12th European Signal Processing Conference, Vienna, Austria, September 6-10, 2004. pages 1361-1364, IEEE, 2004. [doi]
@inproceedings{MaetaK0OCS04, title = {C-based hardware design of IMDCT accelerator for Ogg Vorbis decoder}, author = {Shinichi Maeta and Atsushi Kosaka and Akihisa Yamada 0001 and Takao Onoye and Toru Chiba and Isao Shirakawa}, year = {2004}, url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=7080041}, researchr = {https://researchr.org/publication/MaetaK0OCS04}, cites = {0}, citedby = {0}, pages = {1361-1364}, booktitle = {2004 12th European Signal Processing Conference, Vienna, Austria, September 6-10, 2004}, publisher = {IEEE}, isbn = {978-320-0001-65-7}, }