Hardware-Efficient and Highly Reconfigurable 4- and 2-Track Fault-Tolerant Designs for Mesh-Connected Arrays

Nihar R. Mahapatra, Shantanu Dutt. Hardware-Efficient and Highly Reconfigurable 4- and 2-Track Fault-Tolerant Designs for Mesh-Connected Arrays. J. Parallel Distrib. Comput., 61(10):1391-1411, 2001. [doi]

Authors

Nihar R. Mahapatra

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Shantanu Dutt

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