Physical limitations on the bit-rate of on-chip interconnects

Noha H. Mahmoud, Maged Ghoneima, Yehea I. Ismail. Physical limitations on the bit-rate of on-chip interconnects. In John Lach, Gang Qu, Yehea I. Ismail, editors, Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005. pages 13-19, ACM, 2005. [doi]

@inproceedings{MahmoudGI05,
  title = {Physical limitations on the bit-rate of on-chip interconnects},
  author = {Noha H. Mahmoud and Maged Ghoneima and Yehea I. Ismail},
  year = {2005},
  doi = {10.1145/1057661.1057668},
  url = {http://doi.acm.org/10.1145/1057661.1057668},
  researchr = {https://researchr.org/publication/MahmoudGI05},
  cites = {0},
  citedby = {0},
  pages = {13-19},
  booktitle = {Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005},
  editor = {John Lach and Gang Qu and Yehea I. Ismail},
  publisher = {ACM},
  isbn = {1-59593-057-4},
}