Current Profile Generated by Gating Logic Reduces Power Supply Noise of Integrated CPU Chip

Alak Majumder, Pritam Bhattacharjee. Current Profile Generated by Gating Logic Reduces Power Supply Noise of Integrated CPU Chip. In IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2017, Bhopal, India, December 18-20, 2017. pages 224-228, IEEE, 2017. [doi]

@inproceedings{MajumderB17-0,
  title = {Current Profile Generated by Gating Logic Reduces Power Supply Noise of Integrated CPU Chip},
  author = {Alak Majumder and Pritam Bhattacharjee},
  year = {2017},
  doi = {10.1109/iNIS.2017.53},
  url = {http://doi.ieeecomputersociety.org/10.1109/iNIS.2017.53},
  researchr = {https://researchr.org/publication/MajumderB17-0},
  cites = {0},
  citedby = {0},
  pages = {224-228},
  booktitle = {IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2017, Bhopal, India, December 18-20, 2017},
  publisher = {IEEE},
  isbn = {978-1-5386-1356-6},
}