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Mehrdad Majzoobi, Akshat Kharaya, Farinaz Koushanfar, Srinivas Devadas. Automated Design, Implementation, and Evaluation of Arbiter-based PUF on FPGA using Programmable Delay Lines. IACR Cryptology ePrint Archive, 2014:639, 2014. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Automated Design, Implementation, and Evaluation of Arbiter-based PUF on FPGA using Programmable Delay LinesMehrdad Majzoobi, Akshat Kharaya, Farinaz Koushanfar, Srinivas Devadas. iacr, 2014:639, 2014. [doi] FPGA PUF using programmable delay linesMehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas. wifs 2010: 1-6 [doi]
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