Vertical slit transistor based integrated circuits (VeSTICs) paradigm

Wojciech Maly. Vertical slit transistor based integrated circuits (VeSTICs) paradigm. In Gi-Joon Nam, Prashant Saxena, editors, Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009. pages 63-64, ACM, 2009. [doi]

@inproceedings{Maly09,
  title = {Vertical slit transistor based integrated circuits (VeSTICs) paradigm},
  author = {Wojciech Maly},
  year = {2009},
  doi = {10.1145/1514932.1514947},
  url = {http://doi.acm.org/10.1145/1514932.1514947},
  tags = {rule-based},
  researchr = {https://researchr.org/publication/Maly09},
  cites = {0},
  citedby = {0},
  pages = {63-64},
  booktitle = {Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009},
  editor = {Gi-Joon Nam and Prashant Saxena},
  publisher = {ACM},
  isbn = {978-1-60558-449-2},
}