Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation

Cindy Mark, Scott Y. L. Chin, Lesley Shannon, Steven J. E. Wilton. Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation. ACM Trans. Embedded Comput. Syst., 11(S2):42, 2012. [doi]

@article{MarkCSW12,
  title = {Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation},
  author = {Cindy Mark and Scott Y. L. Chin and Lesley Shannon and Steven J. E. Wilton},
  year = {2012},
  doi = {10.1145/2331147.2331152},
  url = {http://doi.acm.org/10.1145/2331147.2331152},
  researchr = {https://researchr.org/publication/MarkCSW12},
  cites = {0},
  citedby = {0},
  journal = {ACM Trans. Embedded Comput. Syst.},
  volume = {11},
  number = {S2},
  pages = {42},
}