Live Demonstration: Automatic Synthesis of Algorithms on Multi Chip/FPGA with Communication Constraints

Tomohiro Maruoka, Yukio Miyasaka, Akihiro Goda, Amir Masoud Gharehbaghi, Masahiro Fujita. Live Demonstration: Automatic Synthesis of Algorithms on Multi Chip/FPGA with Communication Constraints. In IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, May 26-29, 2019. pages 1, IEEE, 2019. [doi]

Authors

Tomohiro Maruoka

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Yukio Miyasaka

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Akihiro Goda

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Amir Masoud Gharehbaghi

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Masahiro Fujita

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