A 32-bit Superscalar Microprocessor with 64-Bit Processing and High Bandwidth DRAM Interface

Masahito Matsuo, Hiroyuki Kondo, Yukari Takata, Souichi Kobayashi, Mitsugu Satoh, Toyohiko Yoshida, Yuichi Saitoh, Jun-ichi Hinata. A 32-bit Superscalar Microprocessor with 64-Bit Processing and High Bandwidth DRAM Interface. In Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD 94, Cambridge, MA, USA, October 10-12, 1994. pages 203-210, IEEE Computer Society, 1994.

@inproceedings{MatsuoKTKSYSH94,
  title = {A 32-bit Superscalar Microprocessor with 64-Bit Processing and High Bandwidth DRAM Interface},
  author = {Masahito Matsuo and Hiroyuki Kondo and Yukari Takata and Souichi Kobayashi and Mitsugu Satoh and Toyohiko Yoshida and Yuichi Saitoh and Jun-ichi Hinata},
  year = {1994},
  researchr = {https://researchr.org/publication/MatsuoKTKSYSH94},
  cites = {0},
  citedby = {0},
  pages = {203-210},
  booktitle = {Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD  94, Cambridge, MA, USA, October 10-12, 1994},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-6565-3},
}