High speed, low power 100 MS/s front end track-and-hold amplifier for ten-bit pipelined ADC

D. Meganathan, J. Raja Paul Perinbam, R. Deepalakshmi. High speed, low power 100 MS/s front end track-and-hold amplifier for ten-bit pipelined ADC. IJHPSA, 2(1):1-15, 2009. [doi]

@article{MeganathanPD09,
  title = {High speed, low power 100 MS/s front end track-and-hold amplifier for ten-bit pipelined ADC},
  author = {D. Meganathan and J. Raja Paul Perinbam and R. Deepalakshmi},
  year = {2009},
  doi = {10.1504/IJHPSA.2009.030094},
  url = {http://dx.doi.org/10.1504/IJHPSA.2009.030094},
  researchr = {https://researchr.org/publication/MeganathanPD09},
  cites = {0},
  citedby = {0},
  journal = {IJHPSA},
  volume = {2},
  number = {1},
  pages = {1-15},
}