Min-Delay Margin/Error Detection and Correction for Flip-Flops and Pulsed Latches in 10-nm CMOS

Pascal Andreas Meinerzhagen, Sandip Kundu, Andres Malavasi, Trang Nguyen, Muhammad M. Khellah, James W. Tschanz, Vivek De. Min-Delay Margin/Error Detection and Correction for Flip-Flops and Pulsed Latches in 10-nm CMOS. In 45th IEEE European Solid State Circuits Conference, ESSCIRC 2019, Cracow, Poland, September 23-26, 2019. pages 1-4, IEEE, 2019. [doi]

@inproceedings{MeinerzhagenKMN19,
  title = {Min-Delay Margin/Error Detection and Correction for Flip-Flops and Pulsed Latches in 10-nm CMOS},
  author = {Pascal Andreas Meinerzhagen and Sandip Kundu and Andres Malavasi and Trang Nguyen and Muhammad M. Khellah and James W. Tschanz and Vivek De},
  year = {2019},
  doi = {10.1109/ESSCIRC.2019.8902924},
  url = {https://doi.org/10.1109/ESSCIRC.2019.8902924},
  researchr = {https://researchr.org/publication/MeinerzhagenKMN19},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {45th IEEE European Solid State Circuits Conference, ESSCIRC 2019, Cracow, Poland, September 23-26, 2019},
  publisher = {IEEE},
  isbn = {978-1-7281-1550-4},
}