FPGA Based Implementation and Area Performance Analysis of Sigma-Delta Modulated Steepest Algorithm for Channel Equalization

Tayab D. Memon, Aneela Pathan, Paul Beckett. FPGA Based Implementation and Area Performance Analysis of Sigma-Delta Modulated Steepest Algorithm for Channel Equalization. In Tadeusz A. Wysocki, Beata J. Wysocki, editors, 12th International Conference on Signal Processing and Communication Systems, ICSPCS 2018, Cairns, Australia, December 17-19, 2018. pages 1-6, IEEE, 2018. [doi]

@inproceedings{MemonPB18,
  title = {FPGA Based Implementation and Area Performance Analysis of Sigma-Delta Modulated Steepest Algorithm for Channel Equalization},
  author = {Tayab D. Memon and Aneela Pathan and Paul Beckett},
  year = {2018},
  doi = {10.1109/ICSPCS.2018.8631710},
  url = {https://doi.org/10.1109/ICSPCS.2018.8631710},
  researchr = {https://researchr.org/publication/MemonPB18},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {12th International Conference on Signal Processing and Communication Systems, ICSPCS 2018, Cairns, Australia, December 17-19, 2018},
  editor = {Tadeusz A. Wysocki and Beata J. Wysocki},
  publisher = {IEEE},
  isbn = {978-1-5386-5602-0},
}