A RISC-V Neuromorphic Micro-Controller Unit (vMCU) with Event-Based Physical Interface and Computational Memory for Low-Latency Machine Perception and Intelligence at the Edge - researchr publication authors

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Daniel R. Mendat, Jonah P. Sengupta, Gaspar Tognetti, Martin Villemur, Philippe O. Pouliquen, Sergio Montano, Kayode Sanni, Jamal Lottier Molin, Nishant Zachariah, Isidoros Doxas, Andreas G. Andreou. A RISC-V Neuromorphic Micro-Controller Unit (vMCU) with Event-Based Physical Interface and Computational Memory for Low-Latency Machine Perception and Intelligence at the Edge. In IEEE International Symposium on Circuits and Systems, ISCAS 2023, Monterey, CA, USA, May 21-25, 2023. pages 1-5, IEEE, 2023. [doi]

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