Xiangzhi Meng, Liguang Chen, Hao Zhou, Jian Wang, Meng Yang, Jinmei Lai. FPGA interconnect timing library based on the statistical method. In 2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011. pages 393-396, IEEE, 2011. [doi]
@inproceedings{MengCZWYL11,
title = {FPGA interconnect timing library based on the statistical method},
author = {Xiangzhi Meng and Liguang Chen and Hao Zhou and Jian Wang and Meng Yang and Jinmei Lai},
year = {2011},
doi = {10.1109/ASICON.2011.6157204},
url = {http://dx.doi.org/10.1109/ASICON.2011.6157204},
researchr = {https://researchr.org/publication/MengCZWYL11},
cites = {0},
citedby = {0},
pages = {393-396},
booktitle = {2011 IEEE 9th International Conference on ASIC, ASICON 2011, Xiamen, China, October 25-28, 2011},
publisher = {IEEE},
isbn = {978-1-61284-192-2},
}