Design and implementation of 8-bit vedic multiplier using mGDI technique

Shashank S. Meti, C. N. Bharath, Y. G. Praveen Kumar, B. S. Kariyappa. Design and implementation of 8-bit vedic multiplier using mGDI technique. In 2017 International Conference on Advances in Computing, Communications and Informatics, ICACCI 2017, Udupi (Near Mangalore), India, September 13-16, 2017. pages 1923-1927, IEEE, 2017. [doi]

Authors

Shashank S. Meti

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C. N. Bharath

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Y. G. Praveen Kumar

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B. S. Kariyappa

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