In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL

Marius Meyer, Tobias Kenter, Christian Plessl. In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL. J. Parallel Distrib. Comput., 160:79-89, 2022. [doi]

@article{MeyerKP22,
  title = {In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL},
  author = {Marius Meyer and Tobias Kenter and Christian Plessl},
  year = {2022},
  doi = {10.1016/j.jpdc.2021.10.007},
  url = {https://doi.org/10.1016/j.jpdc.2021.10.007},
  researchr = {https://researchr.org/publication/MeyerKP22},
  cites = {0},
  citedby = {0},
  journal = {J. Parallel Distrib. Comput.},
  volume = {160},
  pages = {79-89},
}