Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders

Guadalupe Miñana, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar, Oscar Garnica, Sonia López. Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders. IET Computers & Digital Techniques, 1(2):113-119, 2007. [doi]

Authors

Guadalupe Miñana

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José Ignacio Hidalgo

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Juan Lanchares

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José Manuel Colmenar

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Oscar Garnica

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Sonia López

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