A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver

Masaya Miyabe, Toshiyuki Inoue, Masataka Inoue, Shinya Nakashioya, Akira Tsuchiya, Keiji Kishine. A preamplifier circuit with offset-voltage control technique for 50-Gb/s CMOS PAM4 receiver. In International Conference on Electronics, Information, and Communication, ICEIC 2022, Jeju, Korea, Republic of, February 6-9, 2022. pages 1-4, IEEE, 2022. [doi]

Authors

Masaya Miyabe

This author has not been identified. Look up 'Masaya Miyabe' in Google

Toshiyuki Inoue

This author has not been identified. Look up 'Toshiyuki Inoue' in Google

Masataka Inoue

This author has not been identified. Look up 'Masataka Inoue' in Google

Shinya Nakashioya

This author has not been identified. Look up 'Shinya Nakashioya' in Google

Akira Tsuchiya

This author has not been identified. Look up 'Akira Tsuchiya' in Google

Keiji Kishine

This author has not been identified. Look up 'Keiji Kishine' in Google