On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs

Yousuke Miyake, Seiji Kajihara, Poki Chen. On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs. In IEEE International Test Conference in Asia, ITC-Asia 2019, Tokyo, Japan, September 3-5, 2019. pages 157-162, IEEE, 2019. [doi]

Authors

Yousuke Miyake

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Seiji Kajihara

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Poki Chen

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