Trivium hardware implementations for power reduction

J. M. Mora-Gutiérrez, C. J. Jiménez-Fernández, M. Valencia-Barrero. Trivium hardware implementations for power reduction. I. J. Circuit Theory and Applications, 45(2):188-198, 2017. [doi]

Authors

J. M. Mora-Gutiérrez

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C. J. Jiménez-Fernández

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M. Valencia-Barrero

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