HTR: On-Chip Hardware Task Relocation for Partially Reconfigurable FPGAs

Aurelio Morales-Villanueva, Ann Gordon-Ross. HTR: On-Chip Hardware Task Relocation for Partially Reconfigurable FPGAs. In Philip Brisk, José Gabriel F. Coutinho, Pedro C. Diniz, editors, Reconfigurable Computing: Architectures, Tools and Applications - 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings. Volume 7806 of Lecture Notes in Computer Science, pages 185-196, Springer, 2013. [doi]

@inproceedings{Morales-VillanuevaG13-0,
  title = {HTR: On-Chip Hardware Task Relocation for Partially Reconfigurable FPGAs},
  author = {Aurelio Morales-Villanueva and Ann Gordon-Ross},
  year = {2013},
  doi = {10.1007/978-3-642-36812-7_18},
  url = {http://dx.doi.org/10.1007/978-3-642-36812-7_18},
  researchr = {https://researchr.org/publication/Morales-VillanuevaG13-0},
  cites = {0},
  citedby = {0},
  pages = {185-196},
  booktitle = {Reconfigurable Computing: Architectures, Tools and Applications - 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings},
  editor = {Philip Brisk and José Gabriel F. Coutinho and Pedro C. Diniz},
  volume = {7806},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-642-36811-0},
}