Thierry Moreau, TianQi Chen, Luis Ceze. Leveraging the VTA-TVM Hardware-Software Stack for FPGA Acceleration of 8-bit ResNet-18 Inference. In Luis Ceze, Natalie D. Enright Jerger, Babak Falsafi, Grigori Fursin, Anton Lokhmotov, Thierry Moreau, Adrian Sampson, Phillip Stanley-Marbell, editors, Proceedings of the 1st on Reproducible Quality-Efficient Systems Tournament on Co-designing Pareto-efficient Deep Learning, ReQuEST@ASPLOS 2018, Williamsburg, VA, USA, March 24, 2018. pages 5, ACM, 2018. [doi]
@inproceedings{MoreauCC18,
title = {Leveraging the VTA-TVM Hardware-Software Stack for FPGA Acceleration of 8-bit ResNet-18 Inference},
author = {Thierry Moreau and TianQi Chen and Luis Ceze},
year = {2018},
doi = {10.1145/3229762.3229766},
url = {http://doi.acm.org/10.1145/3229762.3229766},
researchr = {https://researchr.org/publication/MoreauCC18},
cites = {0},
citedby = {0},
pages = {5},
booktitle = {Proceedings of the 1st on Reproducible Quality-Efficient Systems Tournament on Co-designing Pareto-efficient Deep Learning, ReQuEST@ASPLOS 2018, Williamsburg, VA, USA, March 24, 2018},
editor = {Luis Ceze and Natalie D. Enright Jerger and Babak Falsafi and Grigori Fursin and Anton Lokhmotov and Thierry Moreau and Adrian Sampson and Phillip Stanley-Marbell},
publisher = {ACM},
}