A scheduling algorithm for synthesis of bus-partitioned architectures

Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi Tamaru. A scheduling algorithm for synthesis of bus-partitioned architectures. In Isao Shirakawa, editor, Proceedings of the 1995 Conference on Asia Pacific Design Automation, Makuhari, Massa, Chiba, Japan, August 29 - September 1, 1995. ACM, 1995. [doi]

Authors

Vasily G. Moshnyaga

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Fumiaki Ohbayashi

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Keikichi Tamaru

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