3D Cartesian Transport Sweep for Massively Parallel Architectures with PaRSEC

Salli Moustafa, Mathieu Faverge, Laurent Plagne, Pierre Ramet. 3D Cartesian Transport Sweep for Massively Parallel Architectures with PaRSEC. In 2015 IEEE International Parallel and Distributed Processing Symposium, IPDPS 2015, Hyderabad, India, May 25-29, 2015. pages 581-590, IEEE Computer Society, 2015. [doi]

@inproceedings{MoustafaFPR15,
  title = {3D Cartesian Transport Sweep for Massively Parallel Architectures with PaRSEC},
  author = {Salli Moustafa and Mathieu Faverge and Laurent Plagne and Pierre Ramet},
  year = {2015},
  doi = {10.1109/IPDPS.2015.75},
  url = {http://dx.doi.org/10.1109/IPDPS.2015.75},
  researchr = {https://researchr.org/publication/MoustafaFPR15},
  cites = {0},
  citedby = {0},
  pages = {581-590},
  booktitle = {2015 IEEE International Parallel and Distributed Processing Symposium, IPDPS 2015, Hyderabad, India, May 25-29, 2015},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4799-8649-1},
}