Fast Hardware Architecture for 2-D Separable Convolution Operations

Debasish Mukherjee, Susanta Mukhopadhyay. Fast Hardware Architecture for 2-D Separable Convolution Operations. IEEE Trans. on Circuits and Systems, 65-II(12):2042-2046, 2018. [doi]

@article{MukherjeeM18,
  title = {Fast Hardware Architecture for 2-D Separable Convolution Operations},
  author = {Debasish Mukherjee and Susanta Mukhopadhyay},
  year = {2018},
  doi = {10.1109/TCSII.2018.2819187},
  url = {https://doi.org/10.1109/TCSII.2018.2819187},
  researchr = {https://researchr.org/publication/MukherjeeM18},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {65-II},
  number = {12},
  pages = {2042-2046},
}