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High Performance Circuit Techniques for Nueral Front-End Design in 65nm CMOS

Rajasekhar Nagulapalli, Khaled Hayatleh, Steve Barker, Saddam Zourob, Nabil Yassine, B. Naresh Kumar Reddy. High Performance Circuit Techniques for Nueral Front-End Design in 65nm CMOS. In 9th International Conference on Computing, Communication and Networking Technologies, ICCCNT 2018, Bengaluru, India, July 10-12, 2018. pages 1-4, IEEE, 2018. [doi]

Authors

Rajasekhar Nagulapalli

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Khaled Hayatleh

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Steve Barker

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Saddam Zourob

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Nabil Yassine

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B. Naresh Kumar Reddy

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