A Reusable Hybrid RISC Processor with Programmable Instruction Set

Hajer Najjar, Riad Bourguiba, Jaouhar Mouine. A Reusable Hybrid RISC Processor with Programmable Instruction Set. In 15th International Multi-Conference on Systems, Signals & Devices, SSD 2018, Yassmine Hammamet, Tunisia, March 19-22, 2018. pages 1028-1031, IEEE, 2018. [doi]

Authors

Hajer Najjar

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Riad Bourguiba

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Jaouhar Mouine

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