Asymmetric 6T SRAM with two-phase write and split bitline differential sensing for low voltage operation

Satyanand Nalam, Vikas Chandra, Cezary Pietrzyk, Robert C. Aitken, Benton H. Calhoun. Asymmetric 6T SRAM with two-phase write and split bitline differential sensing for low voltage operation. In 11th International Symposium on Quality of Electronic Design (ISQED 2010), 22-24 March 2010, San Jose, CA, USA. pages 139-146, IEEE, 2010. [doi]

@inproceedings{NalamCPAC10,
  title = {Asymmetric 6T SRAM with two-phase write and split bitline differential sensing for low voltage operation},
  author = {Satyanand Nalam and Vikas Chandra and Cezary Pietrzyk and Robert C. Aitken and Benton H. Calhoun},
  year = {2010},
  doi = {10.1109/ISQED.2010.5450400},
  url = {http://dx.doi.org/10.1109/ISQED.2010.5450400},
  tags = {C++},
  researchr = {https://researchr.org/publication/NalamCPAC10},
  cites = {0},
  citedby = {0},
  pages = {139-146},
  booktitle = {11th International Symposium on Quality of Electronic Design (ISQED 2010), 22-24 March 2010, San Jose, CA, USA},
  publisher = {IEEE},
  isbn = {978-1-4244-6455-5},
}