Oscillation analysis and current peak reduction in paralleled SiC MOSFETs

Kimihiro Nanamori, Yusuke Sugihara, Masayoshi Yamamoto. Oscillation analysis and current peak reduction in paralleled SiC MOSFETs. IET Circuits, Devices & Systems, 12(4):390-395, 2018. [doi]

@article{NanamoriSY18,
  title = {Oscillation analysis and current peak reduction in paralleled SiC MOSFETs},
  author = {Kimihiro Nanamori and Yusuke Sugihara and Masayoshi Yamamoto},
  year = {2018},
  doi = {10.1049/iet-cds.2017.0255},
  url = {https://doi.org/10.1049/iet-cds.2017.0255},
  researchr = {https://researchr.org/publication/NanamoriSY18},
  cites = {0},
  citedby = {0},
  journal = {IET Circuits, Devices & Systems},
  volume = {12},
  number = {4},
  pages = {390-395},
}