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FPGA Implementation of the Generalized Delayed Signal Cancelation - Phase Locked Loop Method for Detecting Harmonic Sequence Components in Three-Phase Signals

Paulo Sérgio B. do Nascimento, Helder E. P. de Souza, Francisco A. S. Neves, Leonardo R. Limongi. FPGA Implementation of the Generalized Delayed Signal Cancelation - Phase Locked Loop Method for Detecting Harmonic Sequence Components in Three-Phase Signals. IEEE Transactions on Industrial Electronics, 60(2):645-658, 2013. [doi]

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Paulo Sérgio B. do Nascimento

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Helder E. P. de Souza

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Francisco A. S. Neves

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Leonardo R. Limongi

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