An Efficient Technique for Mapping RTL Structures onto FPGAs - researchr publication authors

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A. R. Naseer, M. Balakrishnan, Anshul Kumar. An Efficient Technique for Mapping RTL Structures onto FPGAs. In Reiner W. Hartenstein, Michal Servít, editors, Field-Programmable Logic, Architectures, Synthesis and Applications, 4th International Workshop on Field-Programmable Logic and Applications, FPL 94, Prague, Czech Republic, September 7-9, 1994, Proceedings. Volume 849 of Lecture Notes in Computer Science, pages 99-110, Springer, 1994.

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