Fault Tolerance in FPGA Architecture Using Hardware Controller - A Design Approach

M. Naseer, Prashant Sharma, Ravi Kshirsagar. Fault Tolerance in FPGA Architecture Using Hardware Controller - A Design Approach. In ARTCom 2009, International Conference on Advances in Recent Technologies in Communication and Computing, Kottayam, Kerala, India, 27-28 October 2009. pages 906-908, IEEE Computer Society, 2009. [doi]

@inproceedings{NaseerSK09,
  title = {Fault Tolerance in FPGA Architecture Using Hardware Controller - A Design Approach},
  author = {M. Naseer and Prashant Sharma and Ravi Kshirsagar},
  year = {2009},
  doi = {10.1109/ARTCom.2009.236},
  url = {http://doi.ieeecomputersociety.org/10.1109/ARTCom.2009.236},
  tags = {architecture, design, systematic-approach},
  researchr = {https://researchr.org/publication/NaseerSK09},
  cites = {0},
  citedby = {0},
  pages = {906-908},
  booktitle = {ARTCom 2009, International Conference on Advances in Recent Technologies in Communication and Computing, Kottayam, Kerala, India, 27-28 October 2009},
  publisher = {IEEE Computer Society},
  isbn = {978-0-7695-3845-7},
}