Performance optimization in flip flop circuit design - researchr publication authors

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Himadri NathSaha, Pooja Joshi, Adriza Chattopadhyay, Barsha Deb, Anurupa Ghosh, Puja Kumari, Dipak Kumar Mahato, Sayantani Choudhuri, Sayani Bhattacharjee, Sourav Chattopadhyay, Pranami Dash, Basab BijoyGharai. Performance optimization in flip flop circuit design. In IEEE 8th Annual Computing and Communication Workshop and Conference, CCWC 2018, Las Vegas, NV, USA, January 8-10, 2018. pages 421-423, IEEE, 2018. [doi]

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