Vu-Duc Ngo, Huy Nam Nguyen, Hae-Wook Choi. The Optimum Network on Chip Architectures for Video Object Plane Decoder Design. In Minyi Guo, Laurence Tianruo Yang, Beniamino Di Martino, Hans P. Zima, Jack Dongarra, Feilong Tang, editors, Parallel and Distributed Processing and Applications, 4th International Symposium, ISPA 2006, Sorrento, Italy, December 4-6, 2006, Proceedings. Volume 4330 of Lecture Notes in Computer Science, pages 75-85, Springer, 2006. [doi]
@inproceedings{NgoNC06,
title = {The Optimum Network on Chip Architectures for Video Object Plane Decoder Design},
author = {Vu-Duc Ngo and Huy Nam Nguyen and Hae-Wook Choi},
year = {2006},
doi = {10.1007/11946441_12},
url = {http://dx.doi.org/10.1007/11946441_12},
tags = {architecture, design},
researchr = {https://researchr.org/publication/NgoNC06},
cites = {0},
citedby = {0},
pages = {75-85},
booktitle = {Parallel and Distributed Processing and Applications, 4th International Symposium, ISPA 2006, Sorrento, Italy, December 4-6, 2006, Proceedings},
editor = {Minyi Guo and Laurence Tianruo Yang and Beniamino Di Martino and Hans P. Zima and Jack Dongarra and Feilong Tang},
volume = {4330},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-68067-5},
}