Thien Truong Nguyen-Ly, Valentin Savin, Xavier Popon, David Declercq. High Throughput FPGA Implementation for regular Non-Surjective Finite Alphabet Iterative Decoders. In 2017 IEEE International Conference on Communications Workshops, ICC Workshops 2017, Paris, France, May 21-25, 2017. pages 961-966, IEEE, 2017. [doi]
@inproceedings{Nguyen-LySPD17,
title = {High Throughput FPGA Implementation for regular Non-Surjective Finite Alphabet Iterative Decoders},
author = {Thien Truong Nguyen-Ly and Valentin Savin and Xavier Popon and David Declercq},
year = {2017},
doi = {10.1109/ICCW.2017.7962783},
url = {https://doi.org/10.1109/ICCW.2017.7962783},
researchr = {https://researchr.org/publication/Nguyen-LySPD17},
cites = {0},
citedby = {0},
pages = {961-966},
booktitle = {2017 IEEE International Conference on Communications Workshops, ICC Workshops 2017, Paris, France, May 21-25, 2017},
publisher = {IEEE},
isbn = {978-1-5090-1525-2},
}