A hardware/software partitioning algorithm for pipelined instruction set processor - researchr publication authors

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Binh Ngoc Nguyen, Masaharu Imai, Nobuyuki Hikichi. A hardware/software partitioning algorithm for pipelined instruction set processor. In Proceedings EURO-DAC 95, European Design Automation Conference with EURO-VHDL, Brighton, England, UK, September 18-22, 1995. pages 176-181, IEEE Computer Society, 1995. [doi]

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