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Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura, Shigeyoshi Watanabe. Reconfigurable Circuit Design Based on Arithmetic Logic Unit Using Double-Gate CNTFETs. IEICE Transactions, 97-A(2):675-678, 2014. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Circuit Design of Reconfigurable Logic Based on Double-Gate CNTFETsManabu Kobayashi, Hiroshi Ninomiya, Shigeyoshi Watanabe. ieicet, 96-A(7):1642-1644, 2013. [doi] Reduced Reconfigurable Logic Circuit Design Based on Double Gate CNTFETs Using Ambipolar Binary Decision DiagramHiroshi Ninomiya, Manabu Kobayashi, Shigeyoshi Watanabe. ieicet, 96-A(1):356-359, 2013. [doi]
The following publications are possibly variants of this publication: