A 2Gb/s network processor with a 24mW IPsec offload for residential gateways

Yukikuni Nishida, Kenji Kawai, Keiichi Koike. A 2Gb/s network processor with a 24mW IPsec offload for residential gateways. In IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010. pages 280-281, IEEE, 2010. [doi]

@inproceedings{NishidaKK10,
  title = {A 2Gb/s network processor with a 24mW IPsec offload for residential gateways},
  author = {Yukikuni Nishida and Kenji Kawai and Keiichi Koike},
  year = {2010},
  doi = {10.1109/ISSCC.2010.5433917},
  url = {http://dx.doi.org/10.1109/ISSCC.2010.5433917},
  researchr = {https://researchr.org/publication/NishidaKK10},
  cites = {0},
  citedby = {0},
  pages = {280-281},
  booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2010, Digest of Technical Papers, San Francisco, CA, USA, 7-11 February, 2010},
  publisher = {IEEE},
  isbn = {978-1-4244-6033-5},
}