Compact low-voltage CMOS analog divider using a four-quadrant multiplier and biasing control circuit

Ivan Padilla-Cantoya. Compact low-voltage CMOS analog divider using a four-quadrant multiplier and biasing control circuit. In 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012. pages 502-505, IEEE, 2012. [doi]

@inproceedings{Padilla-Cantoya12,
  title = {Compact low-voltage CMOS analog divider using a four-quadrant multiplier and biasing control circuit},
  author = {Ivan Padilla-Cantoya},
  year = {2012},
  doi = {10.1109/MWSCAS.2012.6292067},
  url = {https://doi.org/10.1109/MWSCAS.2012.6292067},
  researchr = {https://researchr.org/publication/Padilla-Cantoya12},
  cites = {0},
  citedby = {0},
  pages = {502-505},
  booktitle = {55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-2526-4},
}