Exploiting Symmetry When Verifying Transitor-Level Circuits by Symbolic Trajectory Evaluation - researchr publication authors

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Manish Pandey, Randal E. Bryant. Exploiting Symmetry When Verifying Transitor-Level Circuits by Symbolic Trajectory Evaluation. In Orna Grumberg, editor, Computer Aided Verification, 9th International Conference, CAV 97, Haifa, Israel, June 22-25, 1997, Proceedings. Volume 1254 of Lecture Notes in Computer Science, pages 244-255, Springer, 1997.

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