Dimitra Papagiannopoulou, Andrea Marongiu, Tali Moreshet, Luca Benini, Maurice Herlihy, R. Iris Bahar. Hardware Transactional Memory Exploration in Coherence-Free Many-Core Architectures. International Journal of Parallel Programming, 46(6):1304-1328, 2018. [doi]
@article{Papagiannopoulou18-0,
title = {Hardware Transactional Memory Exploration in Coherence-Free Many-Core Architectures},
author = {Dimitra Papagiannopoulou and Andrea Marongiu and Tali Moreshet and Luca Benini and Maurice Herlihy and R. Iris Bahar},
year = {2018},
doi = {10.1007/s10766-018-0569-7},
url = {https://doi.org/10.1007/s10766-018-0569-7},
researchr = {https://researchr.org/publication/Papagiannopoulou18-0},
cites = {0},
citedby = {0},
journal = {International Journal of Parallel Programming},
volume = {46},
number = {6},
pages = {1304-1328},
}