Session TP5a: Integrated algorithm and architecture implementation

Keshab Parhi. Session TP5a: Integrated algorithm and architecture implementation. In 42nd Asilomar Conference on Signals, Systems and Computers, ACSSC 2008, Pacific Grove, CA, USA, October 26-29, 2008. pages 1511-1512, IEEE, 2008. [doi]

@inproceedings{Parhi08,
  title = {Session TP5a: Integrated algorithm and architecture implementation},
  author = {Keshab Parhi},
  year = {2008},
  doi = {10.1109/ACSSC.2008.5074673},
  url = {https://doi.org/10.1109/ACSSC.2008.5074673},
  researchr = {https://researchr.org/publication/Parhi08},
  cites = {0},
  citedby = {0},
  pages = {1511-1512},
  booktitle = {42nd Asilomar Conference on Signals, Systems and Computers, ACSSC 2008, Pacific Grove, CA, USA, October 26-29, 2008},
  publisher = {IEEE},
  isbn = {978-1-4244-2940-0},
}