Grzegorz Pastuszak. Efficient Hardware Architecture for EBCOT in JPEG 2000 Using a Feedback Loop from the Rate Controller to the Bit-Plane Coder. In Fabio Roli, Sergio Vitulano, editors, Image Analysis and Processing - ICIAP 2005, 13th International Conference, Cagliari, Italy, September 6-8, 2005, Proceedings. Volume 3617 of Lecture Notes in Computer Science, pages 604-611, Springer, 2005. [doi]
@inproceedings{Pastuszak05:0,
title = {Efficient Hardware Architecture for EBCOT in JPEG 2000 Using a Feedback Loop from the Rate Controller to the Bit-Plane Coder},
author = {Grzegorz Pastuszak},
year = {2005},
doi = {10.1007/11553595_74},
url = {http://dx.doi.org/10.1007/11553595_74},
tags = {architecture},
researchr = {https://researchr.org/publication/Pastuszak05%3A0},
cites = {0},
citedby = {0},
pages = {604-611},
booktitle = {Image Analysis and Processing - ICIAP 2005, 13th International Conference, Cagliari, Italy, September 6-8, 2005, Proceedings},
editor = {Fabio Roli and Sergio Vitulano},
volume = {3617},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-28869-4},
}