A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs

Michael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer. A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs. In Mike Hutton, Paul Chow, editors, Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008. pages 87-96, ACM, 2008. [doi]

@inproceedings{PellauerVAAE08,
  title = {A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs},
  author = {Michael Pellauer and Muralidaran Vijayaraghavan and Michael Adler and Arvind and Joel S. Emer},
  year = {2008},
  doi = {10.1145/1344671.1344685},
  url = {http://doi.acm.org/10.1145/1344671.1344685},
  tags = {abstraction},
  researchr = {https://researchr.org/publication/PellauerVAAE08},
  cites = {0},
  citedby = {0},
  pages = {87-96},
  booktitle = {Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, FPGA 2008, Monterey, California, USA, February 24-26, 2008},
  editor = {Mike Hutton and Paul Chow},
  publisher = {ACM},
  isbn = {978-1-59593-934-0},
}