Valentino Peluso, Roberto Giorgio Rizzo, Andrea Calimera, Enrico Macii, Massimo Alioto. Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping. In Thomas Hollstein, Jaan Raik, Sergei Kostin, Anton Tsertov, Ian O'Connor, Ricardo Reis, editors, VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers. Volume 508 of IFIP Advances in Information and Communication Technology, pages 152-172, Springer, 2016. [doi]
@inproceedings{PelusoRCMA16,
title = {Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping},
author = {Valentino Peluso and Roberto Giorgio Rizzo and Andrea Calimera and Enrico Macii and Massimo Alioto},
year = {2016},
doi = {10.1007/978-3-319-67104-8_8},
url = {https://doi.org/10.1007/978-3-319-67104-8_8},
researchr = {https://researchr.org/publication/PelusoRCMA16},
cites = {0},
citedby = {0},
pages = {152-172},
booktitle = {VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers},
editor = {Thomas Hollstein and Jaan Raik and Sergei Kostin and Anton Tsertov and Ian O'Connor and Ricardo Reis},
volume = {508},
series = {IFIP Advances in Information and Communication Technology},
publisher = {Springer},
isbn = {978-3-319-67104-8},
}